刘哲
- 教师拼音名称：Liu Zhe
- 性别：女
- 职称：教授
- 所属院系：微电子学院
- · L. Lou, K. Tang, B. Chen, T. Guo, Y. Wang, W. Wang, Z. Fang, Z. Liu, Y. Zheng, “A 253mW/Channel 4TX/4RX pulsed chirping phased-array radar TRX in 65nm CMOS for x-band synthetic aperture radar imaging,” 2018 IEEE ISSCC, San Francisco, CA, USA, 2018, pp. 160–162.
- · Y. Dong, C. C. Boon, K. Yang and Z. Liu, “A 2-GHz Dual-Path Sub-Sampling PLL with Ring VCO Phase Noise Suppression,” 2022 IEEE Custom Integrated Circuits Conference (CICC), 2022, pp. 1-2.
- · Y. Dong, C. C. Boon, X. Ding, C. Li, and Z. Liu, ''A bidirectional nonlinearly coupled QVCO with passive phase interpolation for multiphase signals generation,” IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 29, no. 7, pp. 1480–1484, Jul. 2021.
- · Y. Dong, L. Kong, C. C. Boon, K. Yang, Z. Liu, C. Li, A. Zhou, “A wideband dB-linear variable-gain amplifier with a compensated negative pseudo-exponential generation technique,” IEEE Trans. Microw. Theory Techn., vol. 69, no. 6, pp. 2809–2821, Jun. 2021.
- · Y. Liang, C. C. Boon, Y. Dong, Q. Chen, Z. Liu, C. Li, T. Mausolf, D. Kissinger, Y. Wang, H. J. Ng, “A 311.6 GHz Phase-locked Loop in 0.13 μm SiGe BiCMOS Process with –90 dBc/Hz in-band Phase Noise,” in Proc. IEEE MTT-S Int. Microw. Symp. (IMS), Aug. 2020. pp. 1133-1136.
- · Y. Dong, L. Kong, C. C. Boon, Z. Liu, C. Li, K. Yang, A. Zhou, “A wideband variable-gain amplifier with a negative exponential generation in 40-nm CMOS technology,” in Proc. IEEE Radio Freq. Integr. Circuits Symp. (RFIC), Aug. 2020, pp. 375–378.
- · Q. Chen, C. C. Boon, X. Zhang, C. Li, Y. Liang, Z. Liu, T. Guo, “Multi-channel FSK Inter/Intra-chip Communication by Exploiting Field-confined Slow-wave Transmission Line,” in Proc. IEEE Int. Symp. Circ. Syst. (ISCAS), Oct. 2020, pp. 1–5.
- · L. Kong, H. Liu, X. Zhu, C. C. Boon, C. Li, Z. Liu, K. S. Yeo, “Design of a wideband variable-gain amplifier with self-compensated transistor for accurate dB-linear characteristic in 65 nm CMOS technology,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 67, no. 12, pp. 4187–4198, Dec. 2020.
- · L. Lou, K. Tang, Z. Fang, B. Chen, T. Guo, Z. Liu, Y. Zheng, “A DDS-driven ADPLL chirp synthesizer with ramp-interpolating linearization for FMCW radar application in 65 nm CMOS,” in Proc. IEEE Int. Symp. Circuits Syst. (ISCAS), Florence, Italy, May 2018, pp. 1–4.